Affiliation:
1. Department of Systems Innovation Engineering, Iwate University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Reference28 articles.
1. [1] T. Hirayama, R. Suzuki, K. Yamanaka, and Y. Nishitani, “Quick computation of the lower bound on the gate count of toffoli-based reversible logic circuits,” Proc. 53rd ISMVL, Matsue, Japan, pp.153-157, May 2023.
2. [3] P. Gupta, A. Agrawal, and N.K. Jha, “An algorithm for synthesis of reversible logic circuits,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol.25, no.11, pp.2317-2330, Nov. 2006. 10.1109/tcad.2006.871622
3. [4] K. Iwama, Y. Kambayashi, and S. Yamashita, “Transformation rules for designing CNOT-based quantum circuits,” Proc. 39th Design Automation Conference, USA, pp.419-424, 2002. 10.1145/514022.514026
4. [5] D. Maslov, G.W. Dueck, and D.M. Miller, “Toffoli network synthesis with templates,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol.24, no.6, pp.807-817, June 2005. 10.1109/tcad.2005.847911
5. [6] D. Miller and G. Dueck, “Spectral techniques for reversible logic synthesis,” Proc. 6th Int. Symp. Representations and Methodology of Future Computing Technologies, Trier, Germany, pp.56-62, March 2003.