Evaluating PAM-4 Data Transmission Quality Using Multi-Dimensional Mapping of Received Symbols
Author:
Affiliation:
1. Graduate School of Science and Technology, Gunma University
2. National Institute of Technology (KOSEN), Oyama College
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Link
https://www.jstage.jst.go.jp/article/transinf/E107.D/8/E107.D_2023LOP0004/_pdf
Reference15 articles.
1. [1] IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force, https://www.ieee802.org/3/bs/
2. [3] D. Cui, H. Zhang, N. Huang, A. Nazemi, B. Catli, H.G. Rhew, B. Zhang, A. Momtaz, and J. Cao, “A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS,” 2016 IEEE International Solid-State Circuits Conference (ISSCC), pp.58-59, 2016. 10.1109/isscc.2016.7417905
3. [4] Y. Yuminaka, T. Kitamura, and Y. lijima, “PAM-4 eye diagram analysis and its monitoring technique for adaptive pre-emphasis for multi-valued data transmissions,” IEEE 47th International Symposium on Multiple-Valued Logic, pp.13-18, 2017. 10.1109/ismvl.2017.29
4. [5] B. Analui, A. Rylyakov, S. Rylov, M. Meghelli, and A. Hajimiri, “A 10-Gb/s two-dimensional eye-opening monitor in 0.13-µm standard CMOS,” IEEE J. Solid-State Circuits, vol.40, no.12, pp.2689-2699, 2005. 10.1109/jssc.2005.856576
5. [6] Y. Yuminaka, K. Taya, and Y. Iijima, “PAM-4 eye-opening monitoring techniques based on Gaussian mixture model fitting,” IEICE Communications Express, vol.9, no.10, pp.464-469, 2020. 10.1587/comex.2020xbl0086
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