Order Adjustment Approach Using Cayley Graphs for the Order/Degree Problem
Author:
Affiliation:
1. Graduate School of Engineering, Hiroshima University
2. Graduate School of Science and Technology, Kumamoto University
3. Division of Computer Engineering, Faculty of Advanced Science and Technology, Kumamoto University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software
Link
https://www.jstage.jst.go.jp/article/transinf/E101.D/12/E101.D_2018PAP0008/_pdf
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2. [2] R. Yasudo, M. Koibuchi, K. Nakano, H. Matsutani, and H. Amano, “Order/radix problem: Towards low end-to-end latency interconnection networks,” Proc. 46th International Conference on Parallel Processing (ICPP), pp.322-331, Aug. 2017. 10.1109/icpp.2017.41
3. [3] N.T. Truong, I. Fujiwara, M. Koibuchi, and K.-V. Nguyen, “Distributed shortcut networks: Low-latency low-degree non-random topologies targeting the diameter and cable length trade-off,” IEEE Trans. Parallel Distrib. Syst., vol.28, no.4, pp.989-1001, April 2017. 10.1109/tpds.2016.2613043
4. [4] J. Kim, W.J. Dally, S. Scott, and D. Abts, “Technology-driven, highly-scalable dragonfly topology,” Proc. 35th International Symposium on Computer Architecture (ISCA), pp.77-88, June 2008. 10.1109/isca.2008.19
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