MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications-Reference-Cited by-同舟云学术

MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications

Published:2014 Issue:11 Volume:E97.D Page:2835-2843
ISSN:0916-8532
Container-title:IEICE Transactions on Information and Systems
language:en
Short-container-title:IEICE Trans. Inf. & Syst.

Author:

GAO Ye¹,SATO Masayuki¹²,EGAWA Ryusuke¹²,TAKIZAWA Hiroyuki²³,KOBAYASHI Hiroaki¹²

Affiliation:

1. Cyberscience Center, Tohoku University

2. JST CREST

3. Graduate School of Information Sciences, Tohoku University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software

Link

https://www.jstage.jst.go.jp/article/transinf/E97.D/11/E97.D_2014EDP7227/_pdf

Reference23 articles.

1. [1] International Telecommunication Union: ITU, “BT.2020: Parameter Values for Ultra-high Definition Television Systems for Production and International Programme Exchange,” http://www.itu.int/rec/ R-REC-BT.2020-0-201208-I, 2012.

2. [2] M. Miura, K. Fudano, K. Ito, K. Aoki, H. Takizawa, and H. Kobayashi, “GPU implementation of phase-based stereo correspondence and its application,” 2012 IEEE International Conference on Image Processing, ICIP2012, pp.1697-1700, 2012.

3. [3] J.L. Hennessy and D.A. Patterson, Computer Architecture: A Quantitative Approach, Fifth Edition, Morgan Kaufmann, San Francisco, CA, USA, 2011.

4. [4] K. Diefendorff and P. Dubey, “How multimedia workloads will change processor design,” Computer, vol.30, pp.43-45, 1997.

5. [5] A. Musa, Y. Sato, T. Soga, K. Okabe, R. Egawa, H. Takizawa, and H. Kobayashi, “A shared cache for a chip multi vector processor,” MEDEA'08: Proc. 9th workshop on MEmory performance, pp.24-29, 2008.