A Leakage Efficient Data TLB Design for Embedded Processors-Reference-Cited by-同舟云学术

A Leakage Efficient Data TLB Design for Embedded Processors

Published:2011 Issue:1 Volume:E94-D Page:51-59
ISSN:0916-8532
Container-title:IEICE Transactions on Information and Systems
language:en
Short-container-title:IEICE Trans. Inf. & Syst.

Author:

LEI Zhao¹,XU Hui¹,IKEBUCHI Daisuke¹,SUNATA Tetsuya²,NAMIKI Mitaro²,AMANO Hideharu¹

Affiliation:

1. Faculty of Science and Technology, Keio University

2. Department of Computer and Information Sciences, Tokyo University of Agriculture and Technology

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software

Link

http://www.jstage.jst.go.jp/article/transinf/E94.D/1/E94.D_1_51/_pdf

Reference16 articles.

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