A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies-Reference-Cited by-同舟云学术

A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies

Published:2019-12-01 Issue:12 Volume:E102.D Page:2377-2388
ISSN:0916-8532
Container-title:IEICE Transactions on Information and Systems
language:en
Short-container-title:IEICE Trans. Inf. & Syst.

Author:

KOSHIBA Atsushi¹,HIROFUCHI Takahiro²,TAKANO Ryousei²,NAMIKI Mitaro³

Affiliation:

1. Processor Research Team, RIKEN Center for Computational Science

2. National Institute of Advanced Industrial Science and Technology (AIST)

3. Tokyo University of Agriculture and Technology

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software

Link

https://www.jstage.jst.go.jp/article/transinf/E102.D/12/E102.D_2019PAP0018/_pdf

Reference25 articles.

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3. [3] ITRS, “International technology roadmap for semiconductors 2013 edition.” http://www.semiconductors.org/clientuploads/Research_Technology/ITRS/2013/2013PIDS.pdf, 2013.

4. [4] Intel, “Intel® optane^TMssd dc p4800x series.” http://www.intel.com/content/www/us/en/solid-state-drives/optane-solid-state-drives-dc-p4800x-series.html, 2017.

5. [5] A. Koshiba, T. Hirofuchi, S. Akiyama, R. Takano, and M. Namiki, “Towards write-back aware software emulator for non-volatile memory,” 2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA), pp.1-6, Aug. 2017. 10.1109/nvmsa.2017.8064479

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