A high performance NVMe host logic engine based on dynamically configurable queues and co-design of NVMe and PCIe-Reference-Cited by-同舟云学术

A high performance NVMe host logic engine based on dynamically configurable queues and co-design of NVMe and PCIe

Published:2024-04-10 Issue:7 Volume:21 Page:20240004-20240004
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Zhibin Zeng¹,Yu Chen¹,He Qu¹,Yongchen Lou¹,Lei Bai²

Affiliation:

1. School of Microelectronics, Xidian University

2. School of Physics and Opto-Electronic Technology, Baoji University of Arts and Sciences

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Link

https://www.jstage.jst.go.jp/article/elex/21/7/21_21.20240004/_pdf

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