Scanline-based rendering of 2D vector graphics
Author:
Affiliation:
1. Dept. of Elec. & Info. Eng., Graduate School, Korea Univ.
2. Fac. of Mech. & Elec. Info., China Univ. of Geosciences
3. R&D Center, Advanced Digital Chips
4. College of Sci. & Tech, Korea Univ.
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
http://www.jstage.jst.go.jp/article/elex/8/11/8_11_788/_pdf
Reference8 articles.
1. Hardware implementation of a tessellation accelerator for the OpenVG standard
2. A High-Performance OpenVG Accelerator with Dual-Scanline Filling Rendering
3. [3] S.-W. Seo, Y.-L. Shen, S.-C. Lee, J.-S. Lee, and H.-C. Oh, “An Accelerator for Rendering 2D Vector Graphics,” Proc. Int. Conf. Computer Graphics and Virtual Reality, pp. 88-93, 2010.
4. [4] I. Antochi, B. Juurlink, S. Vassiliadis, and P. Liuha, “Memory Bandwidth Requirements of Tile-Based Rendering,” Lecture Notes in Computer Science, vol. 3113, pp. 323-332, 2004.
5. [5] D. Nehab and H. Hoppe, “Random Access Rendering of General Vector Graphics,” ACM Trans. Graphics, vol. 27, no. 5, Article 135, 2008.
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1. Design of an OpenVG Hardware Rendering Engine;IEICE Transactions on Information and Systems;2011
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