Affiliation:
1. School of Electrical Engineering, VIT University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference6 articles.
1. Generalized low-error area-efficient fixed-width multipliers
2. [2] N. Petra, D. De Caro, V. Garofalo, E. Napoli, and A. G. M. Strollo, “Design of fixed width multipliers with linear compensation function,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 58, no. 5, pp. 947-960, May 2011.
3. [3] J. M. Jou, S. R. Kuang, and R. Der Chen, “Design of low-error fixed-width multipliers for DSP applications,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 6, pp. 836-842, June 1999.
4. [4] C.-H. Chang and R. Kumar Satzoda, “A low error and high performance multiplexer-based truncated multiplier,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 18, no. 12, pp. 1767-1771, Dec. 2010.
5. [5] K.-C. Kuo and C.-W. Chou, “Low power and high speed multiplier design with row bypassing and parallel architecture,” Microelectronics Journal, vol. 41, no. 10, Oct. 2010.
Cited by
7 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献