A broadband 5-bit CMOS step attenuator in small area with low insertion loss
Author:
Affiliation:
1. School of Microelectronics, Xidian University
2. School of Mechano-Electronic Engineering, Xidian University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/elex/11/9/11_11.20140216/_pdf
Reference6 articles.
1. DC-20 GHz 5-BIT CMOS digital step attenuator with low insertion loss and phase error
2. Intermodulation Distortion in CMOS Attenuators and Switches
3. Analysis and Design of RF CMOS Attenuators
4. 6-bit CMOS Digital Attenuators With Low Phase Variations for $X$-Band Phased-Array Systems
5. A Fully Integrated 0.18-$\mu{\hbox {m}}$ CMOS Transceiver Chip for $X$-Band Phased-Array Systems
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 25–35 GHz 5-bit digital attenuator with low RMS amplitude error and low phase variation in 65 nm CMOS;IEICE Electronics Express;2019
2. A CMOS semi-distributed step attenuator with low insertion loss and low phase distortion;IEICE Electronics Express;2014
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