100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process-Reference-Cited by-同舟云学术

100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process

Published:2010 Issue:4 Volume:E93-C Page:440-444
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

YAMANASHI Yuki¹,KAINUMA Toshiki¹,YOSHIKAWA Nobuyuki¹,KATAEVA Irina²,AKAIKE Hiroyuki²,FUJIMAKI Akira²,TANAKA Masamitsu³,TAKAGI Naofumi³,NAGASAWA Shuichi⁴,HIDAKA Mutsuo⁴

Affiliation:

1. Department of Electrical and Computer Engineering, Yokohama National University

2. Department of Quantum Engineering, Nagoya University

3. Department of Information Science, Nagoya University

4. Superconductivity Research Laboratory, International Superconductivity Technology Center

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://www.jstage.jst.go.jp/article/transele/E93.C/4/E93.C_4_440/_pdf

Reference15 articles.

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2. [2] N. Yoshikawa and K. Koshiyama, “Top-Down RSFQ logic design based on a binary decision diagram,” IEEE Trans. Appl. Supercond., vol.11, no.1, pp.1098-1101, 2001.

3. A single flux quantum standard logic cell library

4. [4] S. Nagasawa, Y. Hashimoto, H. Numata, and S. Tahara, “A 380ps, 9.5mW Josephson 4-kbit RAM operated at a high bit yield,” IEEE Trans. Appl. Supercond., vol.5, no.2, pp.2447-2452, 1995.

5. [5] Y. Yamanashi, M. Tanaka, A. Akimoto, H. Park, Y. Kamiya, N. Irie, N. Yoshikawa, A. Fujimaki, H. Terai, and Y. Hashimoto, “Design and implementation of a pipelined bit-serial SFQ microprocessor, CORE1beta,” IEEE Trans. Appl. Supercond., vol.17, no.2, pp.474-477, 2007.

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