Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation-Reference-Cited by-同舟云学术

Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation

Published:2014 Issue:3 Volume:E97.C Page:132-140
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

NAGASAWA Shuichi¹,HINODE Kenji¹,SATOH Tetsuro¹,HIDAKA Mutsuo¹,AKAIKE Hiroyuki²,FUJIMAKI Akira¹,YOSHIKAWA Nobuyuki³,TAKAGI Kazuyoshi⁴,TAKAGI Naofumi⁴

Affiliation:

1. AIST

2. Nagoya University

3. Yokohama National University

4. Kyoto University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/transele/E97.C/3/E97.C_132/_pdf

Reference21 articles.

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2. [2] H. Numata and S. Tahara, “Fabrication technology for Nb integrated circuits,” IEICE Trans. Electron., vol.E84-C, no.1, pp.2-8, Jan. 2001.

3. [3] K. Hinode, S. Nagasawa, M. Sugita, T. Satoh, H. Akaike, Y. Kitagawa, and M. Hidaka, “Pattern-size-free planarization for multilayered large-scale SFQ circuits,” IEICE Trans. Electron., vol.E86-C, no.12 pp.2511-2513, Dec. 2003.

4. [4] S. Nagasawa, K. Hinode, T. Satoh, H. Akaike, Y. Kitagawa, and M. Hidaka, “Development of advanced Nb process for SFQ circuits,” Physica C, vol.412-414, pp.1429-36, 2004.

5. [5] S. Nagasawa, K. Hinode, T. Satoh, H. Akaike, Y. Kitagawa, and M. Hidaka, “Reliability evaluation of Nb 10kA/cm² fabrication process for large-scale SFQ circuits,” Physica C, vol.426-431, pp.1525-1532, 2005.

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