Gate Array Using Low-Temperature Poly-Si Thin-Film Transistors-Reference-Cited by-同舟云学术

Gate Array Using Low-Temperature Poly-Si Thin-Film Transistors

Published:2020-07-01 Issue:7 Volume:E103.C Page:341-344
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

KIMURA Mutsumi¹²,INOUE Masashi¹,MATSUDA Tokiyoshi²

Affiliation:

1. Department of Electronics and Informatics, Ryukoku University

2. Innovative Materials and Processing Research Center, High-Tech Research Center

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/transele/E103.C/7/E103.C_2018ECP5067/_pdf

Reference17 articles.

1. [1] Y. Kuo, Thin Film Transistors, Materials and Processes, Polycrys-talline Silicon Thin Film Transistors, Kluwer Academic Publishers, 2004.

2. [2] K. Yoneda, R. Yokoyama, and T. Yamada, “Development trends of LTPS TFT LCDs for mobile applications,” VLSI Circuits Symposium'01, pp.85-90, 2001. 10.1109/vlsic.2001.934204

3. [3] S. Uchikoga, “Low-temperature polycrystalline silicon thin-film transistor technologies for system-on-glass displays,” MRS Bulletin, vol.27, no.11, pp.881-886, 2002. 10.1557/mrs2002.277

4. [4] B. Lee, Y. Hirayama, Y. Kubota, S. Imai, A. Imaya, M. Katayama, K. Kato, A. Ishikawa, T. Ikeda, Y. Kurokawa, T. Ozaki, K. Mutaguch, and S. Yamazaki, “A CPU on a glass substrate using CG-silicon TFTs,” ISSCC'03, pp.164-165, 2003. 10.1109/isscc.2003.1234250

5. [5] N. Karaki, T. Nanmoto, H. Ebihara, S. Inoue, and T. Shimoda, “A flexible 8-bit asynchronous microprocessor based on low-temperature poly-silicon (LTPS) TFT technology,” SID'05, pp.1430-1433, 2005. 10.1889/1.2036276