Improvement of Address Discharge Delay Time Using Modified Reset Waveform in AC Plasma Display Panel-Reference-Cited by-同舟云学术

Improvement of Address Discharge Delay Time Using Modified Reset Waveform in AC Plasma Display Panel

Published:2012 Issue:5 Volume:E95.C Page:958-963
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

SHIN Bhum Jae¹,PARK Hyung Dal²,TAE Heung-Sik²

Affiliation:

1. Department of Electronics Engineering, Sejong University

2. School of Electronics Engineering, College of IT Engineering, Kyungpook National University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/transele/E95.C/5/E95.C_5_958/_pdf

Reference15 articles.

1. [1] J.P. Boeuf, “Plasma display panels: Physics, recent developments and key issues,” J. Phys. D, Appl. Phys., vol.36, pp.R53-R79, 2003.

2. [2] L.F. Weber, “History of the plasma display panel,” IEEE Trans. Plasma Science, vol.34, no.2, pp.268-278, 2006.

3. A Driving Method for High-Speed Addressing in an AC PDP Using Priming Effect

4. [4] K. Sakita, K. Takayama, K. Awamoto, and Y. Hashimoto, “High-speed address driving waveform analysis using wall voltage transfer function for three terminals and Vt close curve in three-electrode surface-discharge AC-PDPs,” SID'01Digest, pp.1022-1025, 2001.

5. [6] B.-G. Cho and H.-S. Tae, “A study on wall-charge behavior of single-sustain waveform based on Vt close-curve analysis in ac plasma display panel,” IEEE Trans. Plasma Science, vol.36, no.1, pp.192-199, 2008.

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