Parallel Dual Modulus Prescaler with a Step Size of 0.5-Reference-Cited by-同舟云学术

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Parallel Dual Modulus Prescaler with a Step Size of 0.5

Published:2012 Issue:7 Volume:E95.C Page:1189-1194
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

NAKAMIZO Hideyuki¹,TAJIMA Kenichi¹,HAYASHI Ryoji¹,KAWAKAMI Kenji¹,UOZUMI Toshiya²

Affiliation:

1. Mitsubishi Electric Corporation

2. Renesas Electronics Corporation

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/transele/E95.C/7/E95.C_1189/_pdf

Reference4 articles.

1. A multiple modulator fractional divider

2. Delta-sigma modulation in fractional-N frequency synthesis

3. A Quantization Noise Suppression Technique for$DeltaSigma$Fractional-$N$Frequency Synthesizers

4. [5] A.M. Fahim and M.I. Elmasry, “A wideband sigma-delta phase-locked loop modulator for wireless applications,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol.50, no.2, pp.53-62, Feb. 2003.

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