A Comprehensive Model for Write Disturbance in Resistive Memory Composed of Cross-Point Array
Author:
Affiliation:
1. Toshiba
2. Toyo University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/transele/E100.C/3/E100.C_329/_pdf
Reference23 articles.
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3. [3] Y. Choi, I. Song, M.-H. Park, H. Chung, S. Chang, B. Cho, J. Kim, Y. Oh, D. Kwon, J. Sunwoo, J. Shin, Y. Rho, C. Lee, M.G. Kang, J. Lee, Y. Kwon, S. Kim, J. Kim, Y.-J. Lee, Q. Wang, S. Cha, S. Ahn, H. Horii, J. Lee, K. Kim, H. Joo, K. Lee, Y.-T. Lee, J. Yoo, and G. Jeong, “A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth,” IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, pp.46-48, San Francisco, USA, Feb. 2012.
4. [4] C.J. Chevallier, C.H. Siau, S.F. Lim, S.R. Namala, M. Matsuoka,B.L. Bateman, and D. Rinerson, “A 0.13µm 64Mb multi-layered conductive metal-oxide memory,” IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, pp.260-261, San Francisco, USA, Feb. 2010.
5. [5] A. Kawahara, R. Azuma, Y. Ikeda, K. Kawai, Y. Katoh, K. Tanabe, T. Nakamura, Y. Sumimoto, N. Yamada, N. Nakai, S. Sakamoto, Y.Hayakawa, K. Tsuji, S. Yoneda, A. Himeno, K.-I. Origasa, K. Shimakawa, T. Takagi, T. Mikawa, and K. Aono, “An 8Mb multi-layered cross-point ReRAM macro with 443MB/s write throughput,” IEEE International Solid-State Circuits Conference (ISSCC) Digest of Technical Papers, pp.432-433, San Francisco, USA, Feb. 2012.
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