High Accuracy Test Techniques with Fine Pattern Generator and Ramp Test Circuit for CMOS Image Sensor
Author:
Affiliation:
1. Renesas Electronics Corporation
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/transele/E105.C/7/E105.C_2021CDP0001/_pdf
Reference32 articles.
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2. [2] M.-S. Keel, Y.-G. Jin, Y. Kim, D. Kim, Y. Kim, M. Bae, B. Chung, S. Son, H. Kim, T. An, S.-H. Choi, T. Jung, Y. Kwon, S. Seo, S.-Y. Kim, K. Bae, S.-C. Shin, M. Ki, S. Yoo, C.-R. Moon, H. Ryu, and J. Kim, “A VGA Indirect Time-of-Flight CMOS Image Sensor With 4-Tap 7-µm Global-Shutter Pixel and Fixed-Pattern Phase Noise Self-Compensation,” J. Solid-State Circuits, vol.55, no.4, pp.889-897, 2020. 10.1109/jssc.2019.2959502
3. [3] C. Niclass, M. Soga, H. Matsubara, M. Ogawa, and M. Kagami, “A 0.18-µm CMOS SoC for a 100-m-Range 10-Frame/s 200×96-Pixel Time-of-Flight Depth Sensor,” J. Solid-State Circuits, vol.49, no.1, pp.315-330, 2014. 10.1109/jssc.2013.2284352
4. [4] K. Bong, S. Choi, C. Kim, D. Han, and H.-J. Yoo, “A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector,” J. Solid-State Circuits, vol.53, no.1, pp.115-123, 2018. 10.1109/jssc.2017.2767705
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