Affiliation:
1. Dept. of Electronics, Graduate School of Information Science and Electrical Engineering, Kyushu University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference31 articles.
1. [1] P. J. Restle, et al.: “A clock distribution network for microprocessors,” IEEE J. Solid-State Circuits 36 (2001) 792 (DOI: 10.1109/4.918917).
2. [2] P. E. Gronowski, et al.: “High-performance microprocessor design,” IEEE J. Solid-State Circuits 33 (1998) 676 (DOI: 10.1109/4.668981).
3. [3] A. J. Drake, et al.: “Resonant clocking using distributed parasitic capacitance,” IEEE J. Solid-State Circuits 39 (2004) 1520 (DOI: 10.1109/JSSC.2004.831435).
4. [4] B. Mesgarzadeh, et al.: “Low-power bufferless resonant clock distribution networks,” Circuits and Systems, 2007. MWSCAS 2007 (2007) (DOI: 10.1109/MWSCAS.2007.4488725).
5. [5] B. Mesgarzadeh, et al.: “Jitter characteristic in charge recovery resonant clock distribution,” IEEE J. Solid-State Circuits 42 (2007) 1618 (DOI: 10.1109/JSSC.2007.896691).