Affiliation:
1. School of Electronic and Information Engineering, Beihang University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference35 articles.
1. [1] M. P.-H. Lin, et al.: “Parasitic-aware sizing and detailed routing for binary-weighted capacitors in charge-scaling DAC,” Proc. DAC (2014) 1 (DOI: 10.1145/2593069.2593179).
2. [2] A. Abusleme, et al.: “Mismatch of lateral field metal-oxide-metal capacitors in 180 nm CMOS process,” Electron. Lett. 48 (2012) 286 (DOI: 10.1049/el.2011.3804).
3. [3] R. Aparicio and A. Hajimiri: “Capacity limits and matching properties of integrated capacitors,” IEEE J. Solid-State Circuits 37 (2002) 384 (DOI: 10.1109/4.987091).
4. [4] D. Li, et al.: “A 1.4-mW 10-bit 150-MS/s SAR ADC with nonbinary split capacitive DAC in 65 nm CMOS,” IEEE Trans. Circuits Syst., II, Exp. Briefs 65 (2017) 1524 (DOI: 10.1109/TCSII.2017.2756036).
5. [5] Y. Zhu, et al.: “A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS,” IEEE J. Solid-State Circuits 45 (2010) 1111 (DOI: 10.1109/JSSC.2010.2048498).
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2 articles.
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