Transient program operation model considering distribution of electrons in 3D NAND flash memories-Reference-Cited by-同舟云学术

Transient program operation model considering distribution of electrons in 3D NAND flash memories

Published:2020-12-10 Issue:23 Volume:17 Page:20200335-20200335
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Lee Dong Chan¹,Shin Hyungcheol¹

Affiliation:

1. Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/17/23/17_17.20200335/_pdf

Reference30 articles.

1. [1] H. Tanaka, et al.: “Bit cost scalable technology with punch and plug process for ultra high density flash memory,” 2007 IEEE Symposium on VLSI Technology (2007) 14 (DOI: 10.1109/VLSIT.2007.4339708).

2. [2] R. Katsumata, et al.: “Pipe-shaped BiCS flash memory with 16 stacked layers and multi-level-cell operation for ultra high density storage devices,” 2009 IEEE Symposium on VLSI Technology (2009).

3. [3] J. Jang, et al.: “Vertical cell array using TCAT (Terabit Cell Array Transistor) technology for ultra high density NAND flash memory,” 2009 IEEE Symposium on VLSI Technology (2009).

4. [4] K.-D. Suh, et al.: “A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme,” IEEE J. Solid-State Circuits 30 (1995) 1149 (DOI: 10.1109/4.475701).

5. [5] T.-H. Hsu, et al.: “A high-speed BE-SONOS NAND flash utilizing the field-enhancement effect of FinFET,” 2007 IEEE International Electron Devices Meeting (2007) 913 (DOI: 10.1109/IEDM.2007.4419100).