An efficient and stable composed entropy extraction method for FPGA-based RO PUF-Reference-Cited by-同舟云学术

An efficient and stable composed entropy extraction method for FPGA-based RO PUF

Published:2020-12-25 Issue:24 Volume:17 Page:20200350-20200350
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Li Jin¹,Li Lei¹,Yang Ji²,He Yuanhang³,Zhou Wanting¹,Yuan Shiwei¹

Affiliation:

1. Research Institute of Electronic Science and Technology, University of Electronic Science and Technology

2. Unit 78102 of the Chinese People’s Liberation Army

3. Science and Technology on Communication Security Laboratory, Institute of Southwest Communication

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/17/24/17_17.20200350/_pdf

Reference30 articles.

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3. [3] J. Guajardo, et al.: “FPGA intrinsic PUFs and their use for IP protection,” CHES 2007 4727 (2007) 63 (DOI: 10.1007/978-3-540-74735-2_5).

4. [4] X.T. Ngo, et al.: “Cryptographically secure shield for security IPs protection,” IEEE Trans. Comput. 66 (2017) 354 (DOI: 10.1109/TC.2016.2584041).

5. [5] S.K. Cherupally, et al.: “A smart hardware security engine combining entropy sources of ECG, HRV, and SRAM PUF for authentication and secret key generation,” IEEE J. Solid-State Circuits 55 (2020) 2680 (DOI: 10.1109/JSSC.2020.3010705).

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3. A highly reliable FPGA-based RO PUF with enhanced challenge response pairs resilient to modeling attacks;IEICE Electronics Express;2021-10-25