A D-band CMOS power amplifier for short-range data center communication

Author:

Pan Junren1,Luo Jiang12,He Jin1,Feng Guangyin3,Apriyana Alit3,Zhang Yue Ping3

Affiliation:

1. School of Physics and Technology, Wuhan University

2. Nanjing Electronic Devices Institute

3. School of Electrical and Electronic Engineering, Nanyang Technological University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference30 articles.

1. [1] D.-H. Kim, et al.: “A D-band CMOS amplifier with a new dual-frequency interstage matching technique,” IEEE Trans. Microw. Theory Techn. 65 (2017) 1580 (DOI: 10.1109/TMTT.2017.2655508).

2. [2] K. Katayama, et al.: “133 GHz CMOS power amplifier with 16dB gain and +8dBm saturated output power for multi-gigabit communication,” IEEE European Microwave Integrated Circuit Conference (2013) 69.

3. [3] H.S. Son, et al.: “A D-band CMOS power amplifier for wireless chip-to-chip communications with 22.3 dB gain and 12.2 dBm P1dB in 65-nm CMOS technology,” IEEE Topical Conference on RF/Microwave Power Amplifiers for Radio and Wireless Applications (PAWR) (2018) 35 (DOI: 10.1109/PAWR.2018.8310061)

4. [4] D. Simic and P. Reynaert: “A 14.8 dBm 20.3 dB power amplifier for D-band applications in 40 nm CMOS,” IEEE Radio Frequency Integrated Circuits Symposium (2012) 232 (DOI: 10.1109/RFIC.2018.8428981).

5. [5] H.S. Son, et al.: “A 109 GHz CMOS power amplifier with 15.2 dBm Psat and 20.3 dB gain in 65-nm CMOS technology,” IEEE Microw. Wireless Compon. Lett. 26 (2016) 510 (DOI: 10.1109/LMWC.2016.2574834).

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