A comprehensive metering scheme for intellectual property protection during both after-sale and evaluation periods of IC design-Reference-Cited by-同舟云学术

A comprehensive metering scheme for intellectual property protection during both after-sale and evaluation periods of IC design

Published:2013 Issue:19 Volume:10 Page:20130649-20130649
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Pan Aobo¹,Lin Yaping¹,Che Wenjie¹,You Zhiqiang¹,Liu Yonghe¹,Li Jinguo¹

Affiliation:

1. College of Information Science and Engineering, Hunan University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/10/19/10_10.20130649/_pdf

Reference24 articles.

1. [1] Defense science board (DSB) study on high performance microchip supply, 2005. [Online]. Available: http://www.acq.osd.mil/dsb/reports/2005-02-hpmsreport_final.pdf

2. [2] M. Jacome and H. Peixoto. “A survey of digital design reuse,” IEEE Design and Test of Computers, vol. 18, no. 3, pp. 98-107, 2001.

3. [3] VSI Alliance - IP Protection Development Working Group. The valueand management of intellectual assets, 2000. [Online]. Available: http://vsi.org/documents/datasheets/TOCIPPWP210.pdf

4. [4] R. Colin Johson, Antipiracy scheme aims protect chip makers, [Online]. Available: http://www.eetimes.com/electronics-products/processors/4102736/Antipiracy-scheme-aims-protect-chip-makers

5. [5] Intellectual Poperty Protection: Schemes, Alternatives and Discussion, VSI AllianceTM White Paper. [Online]. Available: http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.115.9058&rep=rep1&type=pdf

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