Design of an H-bridge driver without dead-time generation using gate bias-Reference-Cited by-同舟云学术

Design of an H-bridge driver without dead-time generation using gate bias

Published:2013 Issue:19 Volume:10 Page:20130656-20130656
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Chen Hsin-Chuan¹,Lin Rong-San²

Affiliation:

1. Department of Electronic Engineering, St. John's University, Taiwan

2. Department of Computer Science and Information Engineering, Southern Taiwan University of Science and Technology

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/10/19/10_10.20130656/_pdf

Reference5 articles.

1. [1] N. Mohan, T .M. Undeland and W. P. Robbins, Power Electronics: Converters, Applications, and Design, 2^nd ed., John Wiley & Sons, Inc., 1995.

2. [2] J. Brown and B. Jordan, “Brief H-Bridge Theory of Operation,” http://www.dprg.org/tutorials/1998-04a/, August 2002.

3. [3] T. J. Summers and R. E. Betz, “Dead-Time Issues in Predictive Current Control,” IEEE Transactions on Industry Applications, vol. 40, no. 3, pp.835-844, May/June 2004.

4. [4] N. Urasaki, T. Senjyu, K. Uezato, and T. Funabashi, “Adaptive Dead-Time Compensation Strategy for Permanent Magnet Synchronous Motor Drive,” IEEE Transactions on Energy Conversion, vol. 22, no. 2, pp.271-280, June 2007.

5. [5] H. C. Chen, “An H-Bridge Driver Using Gate Bias for DC Motor Control,” Proc. 17^th IEEE International Symposium on Consumer Electronics, pp. 265-266, June 2013.

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