Highly linear low voltage low power CMOS LNA-Reference-Cited by-同舟云学术

Highly linear low voltage low power CMOS LNA

Published:2013 Issue:21 Volume:10 Page:20130557-20130557
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Kargaran Ehsan¹,Zoka Negar²,Kouzani Abbas Z.³,Mafinezhad Khalil¹,Nabovati Hooman¹

Affiliation:

1. Department of Electrical Engineering Sadjad Institute for Higher Education

2. Department of Electrical Engineering, Ferdowsi University

3. School of Engineering, Deakin University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/10/21/10_10.20130557/_pdf

Reference10 articles.

1. [1] E. Kargaran, M. R. Baghbanmanesh, M. M. Ravari, A. Soltani, K. Mafinezhad and H. Nabovati: Proc. IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) (2012).

2. [2] H. Zhang and E. Sánchez-Sinencio: IEEE Trans. Circuits Syst. I, Reg. Papers 58 [1] (2011) 22.

3. [3] M. Parvizai and A. Nabavi: Electron. Lett. 45 [25] (2009) 1323.

4. Linear programming from generalised scattering matrix analysis of array for minimum sidelobe level and prescribed nulls

5. [5] S. Ganesan, E. Sánchez-Sinencio and J. Silva-Martinez: IEEE Trans. Microw. Theory Tech. 54 [12] (2006) 4079.

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