Diffusion-rounded CMOS for improving both Ion and Ioff characteristics-Reference-Cited by-同舟云学术

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Diffusion-rounded CMOS for improving both Ion and Ioff characteristics

Published:2011 Issue:21 Volume:8 Page:1783-1788
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Ryu Myunghwan¹,Nguyen Hung Viet¹,Kim Youngmin¹

Affiliation:

1. School of Electrical and Computer Engineering, UNIST (Ulsan National Institute of Science and Technology)

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://www.jstage.jst.go.jp/article/elex/8/21/8_21_1783/_pdf

Reference9 articles.

1. [1] ITRS 2010 [Online] http://www.itrs.net/Links/2010ITRS/ Home2010.htm.

2. [2] P. Gupta, A. B. Kahng, Y. Kim, S. Shah, and D. Sylvester, “Investigation of diffusion rounding for post-lithography analysis,” Design Automation Conference, ASPDAC 2008, pp. 480-485, 21-24 March 2008.

3. [3] Y. Ban, S. Sundareswaran, R. Panda, and D. Z. Pan, “Electrical Impact of Line-Edge Roughness on Sub-45nm Node Standard Cell,” SPIE, vol. 7225, 2009.

4. [4] T.-B. Chan and P. Gupta, “On Electrical Modeling of Imperfect Diffusion Patterning,” VLSI Design, 2010. VLSID '10. 23rd International Conference on, pp. 224-229, 3-7 Jan. 2010.

5. [5] R. Singal, A. Balijepalli, A. Subramaniam, F. Liu, S. Nassif, and Y. Cao, “Modeling and analysis of non-rectangular gate for post-lithography circuit simulation,” Design Automation Conference, pp. 823-828, 2007.

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