A Domain Partition Model Approach to the Online Fault Recovery of FPGA-Based Reconfigurable Systems

Author:

SHANG Lihong1,ZHOU Mi1,HU Yu2,YANG Erfu3

Affiliation:

1. School of Computer Science and Engineering, Beihang University

2. Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences

3. Department of Electronic & Electrical Engineering, University of Strathclyde

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Reference26 articles.

1. Low overhead fault-tolerant FPGA systems

2. [2] S. Morinaga, “A general model for reliability maximization problem under given redundancy,” Twenty-Seventh Annual International Symposium on Fault-Tolerant Computing, pp.363-372, 1997.

3. First results of ITC'99 benchmark circuits

4. [4] http://www.cad.polito.it/tools/itc99.html

5. [5] W.J. Huang, Dependable computing techniques for reconfigurable hardware, UMI Microform 3026836, 2001.

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2014

2. Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices;IEICE Transactions on Information and Systems;2013

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