A Multi-Gigabit Parallel Demodulator and Its FPGA Implementation-Reference-Cited by-同舟云学术

A Multi-Gigabit Parallel Demodulator and Its FPGA Implementation

Published:2012 Issue:8 Volume:E95.A Page:1412-1415
ISSN:0916-8508
Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
language:en
Short-container-title:IEICE Trans. Fundamentals

Author:

LIN Changxing¹²,ZHANG Jian¹,SHAO Beibei²

Affiliation:

1. Institute of Electronic Engineering, China Academy of Engineering Physics

2. Department of Engineering Physics, Tsinghua University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Link

https://www.jstage.jst.go.jp/article/transfun/E95.A/8/E95.A_1412/_pdf

Reference8 articles.

1. [1] R. Yamaguchi, A. Hirata, T. Kosugi, and H. Takahashi, “10-Gbit/s MMIC wireless link exceeding 800 meters,” 2008 IEEE Radio and Wireless Symposium, pp.695-698, 2008.

2. [2] H. Takahashi, T. Kosugi, A. Hirata, and K. Murata, “120-GHz-band BPSK modulator and demodulator for 10-Gbit/s data transmission,” 2009 IEEE International Microwave Symposium, pp.557-560, 2009.

3. [3] V. Dyadyuk, J.D. Bunton, J. Pathikulangara, and R. Kendall, “A multigigabit millimeter-wave communication system with improved spectral efficiency,” IEEE Trans. Microw. Theory Tech., vol.55, no.12, pp.2813-2821, 2007.

4. [4] C. Lin, B. Shao, and J. Zhang, “A high data rate parallel demodulator suited to FPGA implementation,” ISPACS 2010-2010 International Symposium on Intelligent Signal Processing and Communication Systems, Proceedings, 2010.

5. [5] M. Srinivasan, C.C. Chen, G. Grebowsky, and A. Gray, “An all-digital, high data-rate parallel receiver,” TDA Progress Report 42-131, Jet Propulsion Laboratory, NASA, Nov. 15 1997.

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