Affiliation:
1. Department of Electronics Engineering, Dankook University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing
Reference15 articles.
1. [1] Y. Nakagome, K. Itoh, M. Isoda, K. Takeuchi, and M. Aoki, “Sub-1-V swing internal bus architecture for future low-power ULSI's,” IEEE J. Solid-State Circuits, vol.28, no.4, pp.414-419, April 1993.
2. [2] H. Zhang, V. George, and J.M. Rabaey, “Low swing on-chip signaling techniques: Effectiveness and robustness,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.8, no.3, pp.264-272, June 2000.
3. [3] R. Colshan and B. Jaroun, “A novel reduced swing CMOS BUS interface circuit for high speed low power VLSI systems,” Proc. IEEE International Symposium on Circuits and Systems, vol.4, pp.351-354, 1994.
4. [4] M.R. Stan and W.P. Burleson, “Bus-invert coding for low-power I/O,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.3, no.1, pp.49-58, March 1995.
5. [5] C.L. Su, C.Y. Tsui, and A.M. Despain, “Low power architecture design and compilation technique for high-performance processors,” Proc. IEEE COMPCON, pp.209-214, Feb. 1994.
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献