AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures

Author:

TRAN Xuan-Tu1,NGUYEN Tung2,PHAN Hai-Phong1,BUI Duy-Hieu1

Affiliation:

1. Key Laboratory for Smart Integrated Systems (SISLAB), VNU University of Engineering and Technology, a member university of Vietnam National University

2. RMIT

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Reference17 articles.

1. [1] W. Dally and B. Towles, “Route packets, not wires: On-chip interconnection networks,” Proc. 2001 Design Automation Conference, pp.684-689, 2001. 10.1145/378239.379048

2. [2] B. Attia, W. Chouchene, A. Zitouni, and R. Tourki, “Network interface sharing for SoCs based NoC,” Proc. 2011 Int'l Conference on Communications, Computing and Control Applications, pp.1-6, 2011. 10.1109/ccca.2011.6031404

3. [3] T. Bjerregaard and J. Sparso, “A router architecture for connection-oriented service guarantees in the MANGO clockless network-on-chip,” Proc. 2005 Design, Automation Test in Europe Conference Exhibition (DATE), pp.1226-1231, 2005. 10.1109/date.2005.36

4. [4] T. Bjerregaard, S. Mahadevan, R. Olsen, and J. Sparsoe, “An OCP compliant network adapter for GALS-based SoC design using the MANGO network-on-chip,” Proc. 2005 International Symposium on System-on-Chip, pp.174-174, 2005. 10.1109/issoc.2005.1595670

5. [5] B. Attia, A. Zitouni, N. Abid, and R. Tourki, “A modular network interface adapter design for OCP compatibles NoCs,” International Journal of Computer and Network Security, vol.1, no.2, pp.101-109, 2009.

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