Efficient Power Network Analysis with Modeling of Inductive Effects-Reference-Cited by-同舟云学术

Efficient Power Network Analysis with Modeling of Inductive Effects

Published:2010 Issue:6 Volume:E93-A Page:1196-1203
ISSN:0916-8508
Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
language:en
Short-container-title:IEICE Trans. Fundamentals

Author:

ZENG Shan¹,YU Wenjian²,HONG Xianlong²,CHENG Chung-Kuan³

Affiliation:

1. Dept. of Computer Science and Technology, Tsinghua University

2. Dept. of Computer Science and Technology, Tsinghua National Laboratory for Information Science and Technology, Tsinghua University

3. Dept. of Computer Science and Engineering, University of California, San Diego

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Link

http://www.jstage.jst.go.jp/article/transfun/E93.A/6/E93.A_6_1196/_pdf

Reference25 articles.

1. [1] M.W. Beattie and L.T. Pileggi, “Inductance 101: Modeling and extraction,” Proc. Design Automation Conference, pp.323-328, 2001.

2. [2] A. Devgan, H. Ji, and W. Dai, “How to efficiently capture on-chip inductance effects: Introducing a new circuit element K,” Proc. International Conference on Computer-Aided Design, pp.150-155, 2000.

3. [3] Y. Du and W. Dai, “Partial reluctance based circuit simulation is efficient and stable,” Proc. Asia and South Pacific Design Automation Conference, pp.483-488, Jan. 2005.

4. INDUCTWISE: inductance-wise interconnect simulator and extractor

5. [5] C. Mizuta, J. Iwai, K. Machida, T. Kage, and H. Masuda, “Large-scale linear circuit simulation with an inversed inductance matrix,” Proc. Asia and South Pacific Design Automation Conference, pp.511-516, Jan. 2004.

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