An Efficient Dual Charge Pump Circuit Using Charge Sharing Clock Scheme-Reference-Cited by-同舟云学术

An Efficient Dual Charge Pump Circuit Using Charge Sharing Clock Scheme

Published:2012 Issue:2 Volume:E95-A Page:439-446
ISSN:0916-8508
Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
language:en
Short-container-title:IEICE Trans. Fundamentals

Author:

HUANG Mengshu¹,ZHANG Yimeng¹,YOSHIHARA Tsutomu¹

Affiliation:

1. Graduate School of Information, Production and System, Waseda University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Link

http://www.jstage.jst.go.jp/article/transfun/E95.A/2/E95.A_2_439/_pdf

Reference19 articles.

1. [1] S. Kobayashi, M. Mihara, Y. Miyawaki, M. Ishii, T. Futatsuya, A. Hosogane, A. Ohba, Y. Terada, N. Ajika, Y. Kunori, K. Yuzuriha, M. Hatanaka, H. Miyoshi, T. Yoshihara, Y. Uji, A. Matsuo, Y. Taniguchi, and Y. Kiguchi, “A 3.3V-only 16 Mb DINOR flash memory,” Solid-State Circuits Conference, 1995. Digest of Technical Papers. 42nd ISSCC, 1995 IEEE International, pp.122-123, 349, Feb. 1995.

2. Circuit techniques for a 1.8-V-only NAND flash memory

3. [3] K. Miyaji, S. Noda, T. Hatanaka, M. Takahashi, S. Sakai, and K. Takeuchi, “A 1.0V power supply, 9.5GByte/sec write speed, single-cell self-boost program scheme for ferroelectric NAND flash SSD,” Memory Workshop (IMW), 2010 IEEE International, pp.1-4, May 2010.

4. An efficient NAND flash file system for flash memory storage

5. A Novel Low-Voltage Low-Power Programming Method for NAND Flash Cell by Utilizing Self-Boosting Channel Potential for Carrier Heating