Author:
Hilgurt S.Ya., ,Chemerys O.A.,
Abstract
The book is devoted to the research and development of methods for combining computational structures for reconfigurable signature-based information protection tools for computer systems and networks in order to increase their efficiency. Network security tools based, among others, on such AI-based approaches as deep neural networking, despite the great progress shown in recent years, still suffer from nonzero recognition error probability. Even a low probability of such an error in a critical infrastructure can be disastrous. Therefore, signature-based recognition methods with their theoretically exact matching feature are still relevant when creating information security systems such as network intrusion detection systems, antivirus, anti-spam, and wormcontainment systems. The real time multi-pattern string matching task has been a major performance bottleneck in such systems. To speed up the recognition process, developers use a reconfigurable hardware platform based on FPGA devices. Such platform provides almost software flexibility and near-ASIC performance. The most important component of a signature-based information security system in terms of efficiency is the recognition module, in which the multipattern matching task is directly solved. It must not only check each byte of input data at speeds of tens and hundreds of gigabits/sec against hundreds of thousand or even millions patterns of signature database, but also change its structure every time a new signature appears or the operating conditions of the protected system change. As a result of the analysis of numerous examples of the development of reconfigurable information security systems, three most promising approaches to the construction of hardware circuits of recognition modules were identified, namely, content-addressable memory based on digital comparators, Bloom filter and Aho–Corasick finite automata. A method for fast quantification of components of recognition module and the entire system was proposed. The method makes it possible to exclude resource-intensive procedures for synthesizing digital circuits on FPGAs when building complex reconfigurable information security systems and their components. To improve the efficiency of the systems under study, structural-level combinational methods are proposed, which allow combining into single recognition device several matching schemes built on different approaches and their modifications, in such a way that their advantages are enhanced and disadvantages are eliminated. In order to achieve the maximum efficiency of combining methods, optimization methods are used. The methods of: parallel combining, sequential cascading and vertical junction have been formulated and investigated. The principle of multi-level combining of combining methods is also considered and researched. Algorithms for the implementation of the proposed combining methods have been developed. Software has been created that allows to conduct experiments with the developed methods and tools. Quantitative estimates are obtained for increasing the efficiency of constructing recognition modules as a result of using combination methods. The issue of optimization of reconfigurable devices presented in hardware description languages is considered. A modification of the method of affine transformations, which allows parallelizing such cycles that cannot be optimized by other methods, was presented. In order to facilitate the practical application of the developed methods and tools, a web service using high-performance computer technologies of grid and cloud computing was considered. The proposed methods to increase efficiency of matching procedure can also be used to solve important problems in other fields of science as data mining, analysis of DNA molecules, etc. Keywords: information security, signature, multi-pattern matching, FPGA, structural combining, efficiency, optimization, hardware description language.
Reference233 articles.
1. S. Ya. Hilʹhurt Analiz zastosuvannya aparatnoho pryskorennya informatsiynoho zakhystu v avtomatyzovanykh systemakh enerhetychnoyi haluzi // Modelyuvannya ta informatsiyni tekhnolohiyi. Zb. nauk. pr. IPME im. H.YE. Pukhova NAN Ukrayiny, № 83, ss. 154-164, 2018.
2. Y. Yang, H. Xu, L. Gao, Y. Yuan, K. McLaughlin ta S. Sezer, "Bahatomirna systema vyyavlennya vtorhnenʹ dlya merezh SCADA na osnovi IEC 61850", IEEE Transactions on Power Delivery, vol. 32, № 2, stor. 1068-1078, 2017, doi: 10.1109/TPWRD.2016.2603339.
3. V. A. Luzhetsʹkyy, A. d. Kozhukhivsʹkyy, O. p. Voynovych, Osnovy informatsiynoyi bezpeky. Navchalʹnyy posibnyk. Vinnytsya: VNTU, 2009.
4. E. H. Amorozo, Osnovy tekhnolohiyi kompʺyuternoyi bezpeky. NJ: Prentice Hall PTR, 1994, 404 s.
5. K. Kasperski, Tekhnika merezhevykh atak. M.: Solon-R, 2001.