Reduced threading dislocation density in a germanium epitaxial film coalesced on an arrayed silicon-on-insulator strip

Abstract

Abstract This paper reports a reduction in the threading dislocation density (TDD) of a Ge epitaxial film on a Si-on-insulator (SOI) wafer in terms of the Si-photonics device application. An array of submicron SOI strips is prepared as a patterned substrate, on which Ge is epitaxially grown by chemical vapor deposition. A continuous Ge film is formed by a coalescence of the adjacent Ge crystals on the arrayed SOI strip, while leaving semicylindrical voids on the exposed surface of the buried SiO2 (BOX) layer between the strips. The TDD of the coalesced Ge film is reduced to 1.0 ± 0.1 × 108 cm–2, which is approximately a half of 2.2 ± 0.2 × 108 cm–2 for a Ge film on an unpatterned SOI. A transmission electron microscope observation reveals that the TDD reduction is derived from a downward bending of the dislocation toward the void. An accumulation of the dislocations at the strip sidewalls also contributes to the TDD reduction.