Minority carrier lifetime extraction methodology based on parallel pn diodes with a field plate

Abstract

Abstract A method for using device simulation to extract the hole lifetime (τ p) of a thin n-type SiC epitaxial layer on the basis of the characteristics of parallel diodes is proposed. The voltage drop (ΔV) across a forward-biased pn diode (single-setup) and parallel pn diodes (multi-setup) at the same current density (J) is correlated with the defined τ p. A severe error in the extraction of ΔV was found and attributed to surface recombination. The extraction error was recovered by the introduction of a field-plate between the anodes, where the field-plate was biased to accumulate the surface of the n-base region. An extraction accuracy of 99% was achieved even with a surface recombination velocity of 105 cm s−1.