Via-switch FPGA with transistor-free programmability enabling energy-efficient near-memory parallel computation

Author:

Hashimoto MasanoriORCID,Bai XuORCID,Banno NaokiORCID,Tada MunehiroORCID,Sakamoto Toshitsugu,Yu JaehoonORCID,Doi Ryutaro,Onodera HidetoshiORCID,Imagawa TakashiORCID,Ochi HiroyukiORCID,Wakabayashi Kazutoshi,Mitsuyama YukioORCID,Sugibayashi Tadahiko

Abstract

Abstract We are developing field-programmable gate arrays (FPGAs) with a new non-volatile switch called via-switch. In via-switch FPGAs (VS-FPGAs), the via-switches required for reconfiguration are placed in the routing layer so that the entire transistor layer can be utilized for computing, and higher implementation density can be achieved compared to conventional SRAM FPGAs. Furthermore, since arithmetic units and memories for computing can be placed under the via-switch crossbar for routing, large-scale parallel operations can be realized where the memory and the arithmetic unit are adjacent to each other. These features enable operation with high energy efficiency. This article reports 65 nm prototype fabrication results and predicted the performance of the VS-FPGA designed for AI applications. We also present the developed application mapping flow and crossbar programming method. The VS-FPGA closes the gap between FPGA and application-specific integrated circuits (ASIC) with the performance advantage of the via-switch and via-switch copy scheme for FPGA-to-ASIC migration, contributing to the expansion of the FPGA usage.

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Memristive Materials, Devices, and Systems;Japanese Journal of Applied Physics;2022-09-05

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