Structural parameter analysis on 6.5 kV integrated time and space carrier controllable dual-gate HiGT (i-TASC)

Abstract

Abstract A dual-gate insulated gate bipolar transistor (IGBT), which achieves low loss through dynamic gate control, is a remarkable technology. However, the influence of device structures on switching loss has not been analyzed in detail. In this paper, we clarify the optimal structure in terms of turn-off loss (E off) reduction for a proposed dual-gate high conductivity IGBT (dual gate HiGT, or i-TASC) that can dynamically control the stored carriers with one-chip fabrication. A boundary region (TS) is introduced in the i-TASC and the conductivity modulation before the turn-off can be sufficiently suppressed by securing the width of TS. A prototyped 6.5 kV i-TASC demonstrates 45% lower E off compared with the conventional single-gate IGBTs.