A General gm/Id Temperature-Aware Design Methodology Using 180 nm CMOS up to 250 °C
-
Published:2022-04-30
Issue:1
Volume:17
Page:1-9
-
ISSN:1872-0234
-
Container-title:Journal of Integrated Circuits and Systems
-
language:
-
Short-container-title:JICS
Author:
Raposo de Oliveira Martins Joao Roberto,De Oliveira Alves Francisco,Maris Ferreira Pietro
Abstract
The advent of the Internet-of-Things brings new challenges in circuit design. The presence of circuits and sensors in harsh environments brought the need for methodologies that account for them. Since the beginning of the transistors, the temperature is known for having a significant impact on performance, and even though very low temperature sensitivity circuits have been proposed, no general methodology for designing them exists. This paper proposes a general gm over Id technique for designing temperature-aware circuits that can be used either on measurement data, analytically, or based on simulation models. This model is validated using measurements up to 250°C of X-FAB XT018 transistors and later with a circuit design example.
Publisher
Journal of Integrated Circuits and Systems
Subject
Electrical and Electronic Engineering
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献