A NOVEL APPROACH FOR THE DESIGN AUTOMATION OF CMOS ANALOG CIRCUITS USING HYBRID SCAmGWO ALGORITHM

Abstract

The widespread use of consumer electronics has made the automation of analog design process inevitable for integrated circuits (ICs) for reduction in the overall time-to-market. In this paper, a novel tool for automated component sizing of CMOS analog circuits is presented using a novel hybrid of sine-cosine algorithm and modified grey wolf optimization algorithm (SCAmGWO) in the optimization section of the automation process. The proposed tool uses the interface of two tools, i.e., CADENCE for accurate model simulation and MATLAB for optimization of parameters using the results from CADENCE, in a loop. The performance of the proposed algorithm is evaluated using a set of different benchmark functions along with comparison. Further, a rigorous performance evaluation is also done with over 20 independent runs and a Wilcoxon rank-sum test. The performance of the proposed algorithm is evaluated with a conventional two-stage operational amplifier as benchmark. The operational amplifier implemented in CADENCE design environment, with 180 nm as standard CMOS technology, uses the aspect ratios calculated by simulating program in MATLAB using 180 nm CMOS standard process. The exploration and exploitation ability of the hybrid algorithm is improved by tailoring the advantages of two algorithms, i.e., sine-cosine algorithm and modified grey wolf optimization algorithm. To prove its acute existence, a statistical study over 20 independent runs is also performed. An overall comparison of the solution with other competing sizing tools proves its efficiency. The immutability of the design obtained using SCAmGWO algorithm is also validated using Monte Carlo simulation and corner analysis.