Device and Circuit Codesign Strategy for Application to Low-Noise Amplifier Based on Silicon Nanowire Metal–Oxide–Semiconductor Field Effect Transistors-Reference-Cited by-同舟云学术

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Device and Circuit Codesign Strategy for Application to Low-Noise Amplifier Based on Silicon Nanowire Metal–Oxide–Semiconductor Field Effect Transistors

Published:2010-04-20 Issue:4 Volume:49 Page:04DN03
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:en
Short-container-title:Jpn. J. Appl. Phys.

Author:

Cho Seongjae,Jhon Hee-Sauk,Lee Jung Hoon,Park Se Hwan,Shin Hyungcheol,Park Byung-Gook

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Reference14 articles.

1. RF potential of a 0.18-μm CMOS logic device technology

2. Impact of a Process Variation on Nanowire and Nanotube Device Performance

3. A three-dimensional quantum simulation of silicon nanowire transistors with the effective-mass approximation

4. Wiring Effect Optimization in 65-nm Low-Power NMOS

5. Novel Gate-All-Around Metal–Oxide–Semiconductor Field Effect Transistors with Self-Aligned Structure

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Correlation between performance characteristics of indoor photovoltaic devices and DC‐to‐DC up‐converters for low‐power electronic applications;IET Circuits, Devices & Systems;2021-04-04

2. Electro-Static Discharge Protection Design for V-Band Low-Noise Amplifier Using Radio Frequency Junction Varactor;Japanese Journal of Applied Physics;2013-04-01

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