Author:
Sendag Resit,Lilja David,Yi Joshua
Reference17 articles.
1. Sodani, A. and Sohi, G. Dynamic Instruction Reuse, International Symposium on Computer Architecture, 1997.
2. Yi, J., Sendag, R., and Lilja, D. Increasing Instruction-Level Parallelism with Instruction Precomputation, Euro-Par, 2002.
3. Kessler, R., McLellan, E., and Webb, D. The Alpha 21264 Microprocessor Architecture, International Conference on Computer Design, 1998.
4. The Mips R10000 superscalar microprocessor