Author:
Tsia Kevin,Fathpour Sasan,Jalali Bahram
Reference36 articles.
1. T. Ghani, M. Armstrong, C. Auth et al., A 90 nm high volume manufacturing logic technology featuring novel 45 nm gate length strained silicon CMOS transistors, IEEE International Electron Devices Meeting, 2003 Technical Digest, pp.11.6.1-11.6.3, 2003.
2. Piezoelectric Transducers and Applications
3. Fundamentals of Photonics
4. Birefringence control using stress engineering in silicon-on-insulator (SOI) waveguides
5. V. Raghunathan and B. Jalali, Stress-induced phase matching in silicon waveguides, Conference of Lasers and Electro-Optics (CLEO), Long Beach, CA (2006) Paper CMK5.