1. Tzi-Cker Chiueh and Prashant Pradhan, Cache Memory Design for Network Processors. Proc. IEEE Sixth International Symposium on High-Performance Computer Architecture, January 2000, pp.409-419, Los Alamitos, California.
2. Kartik Gopalan and Tzi-Cker Chiueh, Improving route lookup performance using network processor cache. Proceedings of the 2002 ACM/IEEE Conference on Supercomputing, 2002, Baltimore, Maryland, pp.1-10.
3. Huan Liu, Routing prefix caching in network processor design. Proceedings International Conference on Computer Communications and Networks (ICCCN), 2001, Phoenix, Arizona, pp.18-23.
4. Akhbarizadeh, M.J. and Nourani, M. Efficient prefix cache for network processors. 12th Annual IEEE Symposium on High Performance Interconnects, Aug 2004, pp.41-46.