1. Current-mode signaling in deep submicrometer global interconnects
2. Beyne, E. 2006. The rise of the 3rd dimension for system integration. Proceedings of IEEE International Interconnect Technology Conference, Burlingame, CA, IEEE, pp.1-5, June5-7.
3. Carloni, L. P., Pande, P. P., and Yuan, X. 2009. Networks-on-Chip in emerging interconnect paradigms: Advantages and challenges. Proceedings of ACM/IEEE International Symposium on Networks-on-Chips, San Diego, CA, IEEE, pp.93-102, May10-13.
4. Chang, M. F. et al. 2008. CMP network-on-chip overlaid with multi-band RF interconnect. Proceedings of International Symposium on High-Performance Computer Architecture, Salt Lake City, UT, IEEE, pp.191-202, February16-20.
5. Cianchetti, M. J., Kerekes, J. C., and Albonesi, D. H. 2009. Phastlane: A rapid transit optical routing network. International Symposium on Computer Architecture Austin, Texas, USA, ACM, pp.441-450, 20-24 June.