(Invited) Pattern and Emissivity Insensitive Dopant Activation and Silicide Contact Formation Annealing in a Hot Wall Rapid Thermal Annealing System

Abstract

Local temperature non-uniformity during rapid thermal annealing (RTA) is an important contributor to within-die process variations which cause significant problems for advanced complimentary metal-oxide-semiconductor (CMOS) device manufacturing. RTA-induced variations strongly depend on circuit layout patterns and optical properties of exposed materials on the surface of the Si wafers. To reduce the “pattern effect”, a hot wall (furnace-based) RTA approach has been proposed and compared with a conventional cold wall (lamp-based) RTA approach in device manufacturing. Nickel and cobalt silicide formations on implanted single crystalline Si in the source/drain region, and implanted poly-Si word lines of memory devices were studied over wide ranges of RTA temperature and time using a hot wall RTA system, which uses mainly natural convection and conduction through ambient gas. Differences between cold wall (radiant) and hot wall (non-radiant) heating on the silicide formation and dopant profiles are compared. The hot wall RTA resulted in superior process uniformity and repeatability regardless of pattern size and emissivity differences on device wafers. Local metal film thickness variations and its interaction with local temperature non-uniformity during RTA are identified as major contributors for the silicidation process variations such as non-uniformity and non-repeatability.