Current Challenges in Ge MOS Technology

Abstract

Germanium high mobility metal oxide field effect transistors with high-k gates are considered to be good candidates for high performance applications. To develop a viable Ge MOS technology, we are facing a number of challenges. First, we need to engineer compliant Ge substrates in order to ensure volume production at low cost. Second, we must develop adequate Ge surface passivation methodology and identify appropriate high-k gate dielectrics to combine oxide scaling below 1 nm with good electrical quality of the interfaces. Finally, we need to master processing of Ge transistors to minimize the junction leakage and enhance channel mobility by at least a factor of 3 for both n and p-channel transistors.