Author:
Schenk Andreas,Sant Saurabh,Moselund Kirsten,Riel Heike
Abstract
Two different nanowire tunnel FETs, based either on the InAs/Si or the In0.53Ga0.47As/InP hetero-system, are investigated by device simulation. Variations of radius, equivalent oxide thickness, local doping, valence band offset, temperature, and the effect of trap-assisted tunneling on the sub-threshold slope and the on-current of the transistors are demonstrated.
Publisher
The Electrochemical Society
Cited by
8 articles.
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