Application Of HCl Gas Phase Etch In The Production Of Novel Devices

Abstract

Multigate MOSFET and epi-tip transistors are promising device concepts which are currently actively investigated. Being attractive from the performance point of view they present certain technological challenges. One of them is the difficulty to control poly-gate encapsulation during the HF removal of native SiO2 prior to the epitaxial Si deposition of raised sourse/drains. Failed poly-Si encapsulation results in the growth of poly-Si during selective epitaxial growth (SEG) of Si, which shortcuts the source/drain areas. Further it might lead to shadowing effects during post epi implantation steps. These issues can be solved by HCl gas phase etch which effectively removes poly-Si with minimal Source/Drain removal. In this paper, we first discuss the HCl gas phase etch selectivity between poly-Si and crystalline Si (c-Si) in the temperature range of 575 - 8500C as measured on blanket wafers. Further, we show how this selectivity can be implemented in the production scheme of FinFET devices and epi-tip transistors and as a surface preparation for the epi deposition. Difficulties which can arise due to the HCl gas phase etch are also presented and discussed.