High-Speed Alkaline Etching for Backside Exposure of Through Silicon Vias

Abstract

We developed the high-speed alkaline etching of silicon for backside exposure of through silicon vias (TSVs). The spin etching rate of silicon was 2.1-6.6 μm/min when an accelerator was added to KOH solution. The etching rate ratio of silicon to Tetraethyl orthosilicate (TEOS) SiO2 was 66-125. We also applied KOH/accelerator solution to 8-inch Si (100) wafer with buried Cu/Ta vias. The most of buried Cu/Ta vias were uniformly exposed. The terraced structures were generated in the Si surface, although their step height was so small as to be negligible for practical application.