First Demonstration of Vertical Sandwich GAA TFETs with Self-Aligned High-k Metal Gates and Abrupt Doping Tunneling Junctions

Author:

Zhang YongkuiORCID,Li Yangyang,Zhu Huilong,Wang Qi,Du Yong,Lu Shunshun,Li Junjie,Kong Zhenzhen,He Xiaobin,Liu JinbiaoORCID,Li Chen,Huang WeixingORCID,Xie Lu,Xiao Zhongrui,Xu Gaobo,Wang Guilei,Zhao Chao,Luo Jun

Abstract

A new type of vertical sandwich gate-all around tunneling field-effect-transistors (TFETs), called VSATFETs, was demonstrated firstly with a CMOS-compatible process. The VSATFETs with self-aligned high-κ metal gates (HKMG) and abrupt doping tunneling junctions were fabricated with the epitaxial of p+−Si/i-SiGe/n+−Si sandwich structure and an isotropic quasi-atomic layer-etch (qALE) process. VSATFETs have the advantage of excellent control of channel size, because its gate-length is mainly determined by the thickness of SiGe film grown by epitaxy, and the diameter of the nanowires (NWs)/thickness of nanosheets (NSs) is determined by the qALE etching of SiGe selective to Si. A NW VSATFET with a diameter of 18 nm was fabricated and exhibits excellent characteristics: SSmin = 61.64 mV dec−1, Ion = 2.25 × 10−7 A u−1m−1 (@Vgs−Vt = 0.45 V, Vd = 0.65 V), Ion/Ioff = 1.81 × 106, DIBL = 7.58 mV. The effect of interface traps on the device performance was analyzed by the calibrated model. It is found that the device performance can be improved by decreasing the thickness/diameter of NS/NW TFET.

Publisher

The Electrochemical Society

Subject

Electronic, Optical and Magnetic Materials

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